LEVELING UP SEMICONDUCTORS

As chip scaling continues, traditional copper interconnects become a bottleneck due to increasing resistance-capacitance delays and power consumption. This drives the need for new materials with higher conductivity to maintain performance gains.

Our low-cost, sustainable graphene interconnect technology already outperforms copper with 1.4X electrical and over 2X thermal conductivity with minimal RnD budget and time. It already provides a seamless, production-friendly transition path leveraging existing semiconductor infrastructure.

Further enhancements of nSD and SUSANNE at scale are possible and likely, future-proofing computing roadmaps for AI, ML, and data-intensive applications in a cost-effective, modular manner.

Our proprietary low-energy process is environmentally friendly and avoids costly overheads, enabling rapid design iterations. With superior performance and cost-effectiveness, our technology is poised to revolutionize high-performance, energy-efficient chip design.

 

High-performance nSD-enhanced interconnects for ICs/PCBs

IN DEVELOPMENT: nSD-I (nSD for Interconnects)

Q2 2024 Updates:

Submissions for the Hilton Head Workshop 2024: poster, abstract

Synthesized using techniques and equipment evolved from our original SUSANNE tech.